Researched interview questions, process detail, and difficulty signals for Broadcom, compiled by the Primly research team.
6 experiencesDifficulty 3.5/5Semiconductors
Field Applications Engineer (Networking and Connectivity)
virtual
· Difficulty 3/5
The process usually starts with a recruiter screen covering region alignment, travel expectations, customer exposure, and background supporting OEMs, hyperscalers, or networking equipment makers. Candidates report an early conversation with the hiring manager focused on technical breadth across networking, connectivity, and board level integration, plus communication skills for customer facing work. Next is commonly a panel with technical peers that tests ability to troubleshoot at the boundary between silicon, firmware, drivers, and customer systems, often using scenario based problem solving rather than abstract puzzles. For manager level roles, an additional round may include leadership interviews centered on running escalations, coaching FAEs, and coordinating with product line engineering and program teams. Final steps frequently include a meeting with regional or business unit leadership to assess customer strategy, forecasting discipline, and collaboration style; overall timing often ranges from a few weeks to over a month depending on coordination with multiple stakeholders.
A customer reports link bring up failures on a high speed interface using Broadcom silicon. What is your step by step triage plan across signal integrity, PHY configuration, firmware, and driver layers?
How do you translate a customer’s system requirements into actionable guidance for internal design or product line teams, especially when requirements are ambiguous or changing?
Explain how you would debug intermittent packet loss in a network switch platform where the issue only appears at high utilization. What counters, logs, and experiments would you request?
Describe how you handle an escalation when the customer wants an immediate workaround but engineering believes the root fix requires a longer release cycle.
What does great customer facing communication look like when the problem is not yet understood and timelines are uncertain?
Staff Software Engineer (Infrastructure Software)
virtual
· Difficulty 4/5
The process commonly begins with a recruiter conversation confirming the product area within Broadcom’s infrastructure software portfolio and aligning on scope and seniority. Candidates often report an initial technical screen emphasizing systems fundamentals such as concurrency, memory management, networking basics, and reading or reasoning about existing code. The main loop typically includes multiple virtual interviews split between coding and architecture, with interviewers testing ability to design maintainable services or components and to troubleshoot production style failures. For senior levels, a dedicated design interview frequently focuses on tradeoffs, API design, scalability, performance profiling, and operational concerns like observability and incident response. A final round usually includes a manager and sometimes cross functional stakeholders to assess technical leadership, prioritization, and ability to deliver in multi team enterprise environments; the end to end timeline is often several weeks, with scheduling influenced by interviewer availability.
Design a service that ingests high volume events and supports near real time queries. How would you handle backpressure, retries, and idempotency?
In C or C++, explain how you would diagnose a memory leak and a use after free in a long running daemon. What tools and signals would you use?
A customer reports intermittent latency spikes in a component under load. How would you triage whether the cause is GC, lock contention, I/O saturation, or downstream dependency behavior?
Describe an architecture decision you made where performance and maintainability conflicted. What tradeoffs did you choose and how did you defend them to peers?
Broadcom’s enterprise customers often require reliability and cautious change management. How do you approach rolling out risky changes while minimizing operational impact?
ASIC Verification Engineer
virtual
· Difficulty 4/5
The process typically starts with a recruiter screen focused on team fit, work authorization, and role alignment across Broadcom’s ASIC and networking silicon groups. Candidates report a first technical phone or video screen with a verification engineer that concentrates on SystemVerilog fundamentals, testbench architecture, and debugging mindset. Next is a deeper virtual panel, often two to four interviews, covering UVM methodology, assertions, functional coverage, and practical bug triage using waveform level reasoning. Some teams include a short live coding or pseudo coding exercise where candidates sketch a checker, scoreboard logic, or a constrained random stimulus strategy rather than writing full compilable code. Final steps usually include a hiring manager conversation focused on ownership, collaboration with design teams, and readiness to operate in a tapeout driven environment; overall timelines commonly run a few weeks depending on headcount urgency and candidate availability.
Walk through how a UVM testbench is structured for a complex block, including sequencers, drivers, monitors, and scoreboards. Where do you put protocol knowledge and why?
Given a failing test where the DUT hangs intermittently, how would you isolate whether the root cause is stimulus, a race in the testbench, or a design bug?
Write or outline SystemVerilog assertions for a ready/valid interface to ensure no data loss and proper backpressure handling.
How do you decide what functional coverage to write for a networking or SerDes adjacent block, and how do you use coverage results to guide new tests?
Describe a time you received a late breaking bug report close to a milestone. How did you communicate risk and drive resolution with design and validation partners?