Background: embedded / hardware, 10 years in. Done 6 phone screens this year across defense-adjacent, consumer electronics, and a couple of EV companies. The software people have a whole ecosystem of LC prep and documented loops. Hardware folks get... almost nothing. So here's what I'm seeing.
What's showing up across the board:
Digital design fundamentals. State machines are everywhere. Be ready to walk through a simple FSM design problem verbally. How do you handle metastability, how do you design for testability. These are phone-screen level for senior roles.
Communication protocols. I2C, SPI, UART are table stakes. At least two screens went straight into CAN bus and one asked about PCIe lanes. Know the tradeoffs, not just the definitions.
Power consumption. This was a bigger theme than I expected, probably driven by the EV and wearables boom. Questions like: how would you reduce power in a battery-constrained embedded system. Duty cycling, DVFS, sleep states.
What varied: The defense-adjacent companies asked heavily about DO-178C and safety-critical coding standards. Consumer electronics didn't touch that at all. Know your audience.
One company had me do a verbal logic problem about pull-up resistors that was closer to an EE quiz than an interview question. Seemed like a filter, not a real signal.
What I didn't see: Any AI/ML angle at the phone screen level, even at companies doing hardware AI acceleration. That seems to come later in the loop if at all.
Happy to share more if people want specifics on any company type. Hardware folks are rare on forums like this.